# 16V8 for I/O number two (U44) Omniport

Device 16V8

input
    SYNC:1,         # Sync from CPU
                    # Input 2 not used
    GATE1:3,        # Status of Gate1
    GATE0:4,        # Status of Gate0
    T3IOW:5,        # From CPU GAL says an I/O write cycle is in progress
    T3IOR:6,        # From CPU GAL says an I/O read cycle is in progress
    A11:7,          # Address bus
    A10:8,          # Address bus
    A9:9,           # Address bus
                    # Input 11 not used

output
    OMNI_TO_BUS.L:12,       # Enable omniport data to the CPU data bus
    BUS_TO_OMNI.L:13,       # Enable latched data onto the omniport data bus
    OMNI_OUT_LATCH:14,      # Latch data to go on the omniport
    GDI.L:15,               # Gate data in Omniport control line
    GSI.L:16,               # Gate status in Omniport control line
    DOS.L:17,               # Data out strobe Omniport control line
    COS.L:18,               # Command out strobe Omniport control line
    AOS.L:19,               # Address out strobe Omniport control line
    
temp
    adr_0, adr_1, adr_2, adr_3, adr_4,
    
implementation

adr_0 equ !A11 & !A10 & !A9
adr_1 equ !A11 & !A10 &  A9
adr_2 equ !A11 &  A10 & !A9
adr_3 equ !A11 &  A10 &  A9
adr_4 equ  A11 & !A10 & !A9

#Here we assume that the GATEs fire only for output operations
AOS             equ adr_1 & GATE0 & GATE1
COS             equ adr_2 & GATE0 & GATE1
DOS             equ adr_3 & GATE0 & GATE1
GSI             equ adr_2 & T3IOR
GDI             equ adr_3 & T3IOR
OMNI_OUT_LATCH  equ GATE0 & !GATE1
OMNI_TO_BUS     equ T3IOR & (adr_2 | adr_3)
BUS_TO_OMNI     equ (GATE0 | GATE1) & (Adr_1 | Adr_2 | Adr_3)